RLS=0, RDR1=0, RXT=0, TRFC=0, TFS=0, TFE0=0, TDE0=0, TLS=0, RDR0=0, RFF1=0, ROE1=0, TDE1=0, RFF0=0, TFE1=0, CMDAU=0, RFRC=0, CMDDU=0, TUE0=0, ROE0=0, TUE1=0, RFS=0
I2S Interrupt Status Register
| TFE0 | Transmit FIFO Empty 0. 0 (0): Transmit FIFO0 has data for transmission. 1 (1): Transmit FIFO0 is empty. |
| TFE1 | Transmit FIFO Empty 1. 0 (0): Transmit FIFO1 has data for transmission. 1 (1): Transmit FIFO1 is empty. |
| RFF0 | Receive FIFO Full 0. 0 (0): Space available in receive FIFO0. 1 (1): Receive FIFO0 is full. |
| RFF1 | Receive FIFO Full 1. 0 (0): Space available in receive FIFO1. 1 (1): Receive FIFO1 is full. |
| RLS | Receive Last Time Slot. 0 (0): Current time slot is not last time slot of frame. 1 (1): Current time slot is the last receive time slot of frame. |
| TLS | Transmit Last Time Slot. 0 (0): Current time slot is not last time slot of frame. 1 (1): Current time slot is the last transmit time slot of frame. |
| RFS | Receive Frame Sync. 0 (0): No occurrence of receive frame sync. 1 (1): Receive frame sync occurred during reception of next word in RX registers. |
| TFS | Transmit Frame Sync. 0 (0): No occurrence of transmit frame sync. 1 (1): Transmit frame sync occurred during transmission of last word written to TX registers. |
| TUE0 | Transmitter Underrun Error 1. 0 (0): No underrun detected 1 (1): Transmitter underrun error occurred |
| TUE1 | Transmitter Underrun Error 1. 0 (0): No underrun detected 1 (1): Transmitter underrun error occurred |
| ROE0 | Receiver Overrun Error 0. 0 (0): No overrun detected 1 (1): Receiver overrun error occurred |
| ROE1 | Receiver Overrun Error 1. 0 (0): No overrun detected 1 (1): Receiver overrun error occurred |
| TDE0 | Transmit Data Register Empty 0. 0 (0): Data available for transmission. 1 (1): Data needs to be written by the core for transmission. |
| TDE1 | Transmit Data Register Empty 1. 0 (0): Data available for transmission. 1 (1): Data needs to be written by the core for transmission. |
| RDR0 | Receive Data Ready 0. 0 (0): No new data for core to read. 1 (1): New data for core to read. |
| RDR1 | Receive Data Ready 1. 0 (0): No new data for core to read. 1 (1): New data for core to read. |
| RXT | Receive Tag Updated. 0 (0): No change in ATAG register. 1 (1): ATAG register updated with different value. |
| CMDDU | Command Data Register Updated. 0 (0): No change in ACDAT register. 1 (1): ACDAT register updated with different value. |
| CMDAU | Command Address Register Updated. 0 (0): No change in ACADD register. 1 (1): ACADD register updated with different value. |
| TRFC | Transmit Frame Complete. 0 (0): End of frame not reached. 1 (1): End of frame reached after disabling CR[TE] or disabling CR[TFRCLKDIS], when transmitter is already disabled. |
| RFRC | Receive Frame Complete. 0 (0): End of frame not reached. 1 (1): End of frame reached after disabling CR[RE] or disabling CR[RFRCLKDIS], when receiver is already disabled. |